Wide Area Network Structure

Local Area Network Structure

Network Structure

• Local Area Network (LAN)
• Wide Area Network (WAN)

CPU Protection

• Timer-interrupts computer after specified period to ensure operating system maintains control.
• Timer is decremented every clock tick.
• When timer reaches the value 0, an interrupt occurs.
• Timer commonly used to implement time sharing.
• Time also used to compute the current time.
• Load-timer is a privileged instruction.

Hardware Protection

• When executing in monitor mode,the operating system has unrestricted access to both monitor and user's memory.
• The load instructions for the base and limit registers are privileged instructions.

Hardware Address Protection

Use of A Base and Limit Register

Memory Protection

• Must provide memory protection atleast for the interrupt vector and the interrupt services routines.
• In order to have memory protection,add two registers that determines about the range of legal addresses a program may access:
• Base Register-holds the smallest legal physical memory address.
• Limit Register-contains the size of the range.
• Memory outside the defined range is protected.

Use of A System Call to Perform I/O

I/O Protection

• All I/O instructions are privileged instructions.
• Must ensure that a user program could never gain control of the computer in monitor mode (I.e., a user program that, as part of its execution, stores a new address in the interrupt vector). 

Dual-Mode Operation

• Sharing system resources requires operating system to ensure that an incorrect program cannot cause other programs to execute incorrectly.
• Provide hardware support to differentiate between at least two modes of operation.
• User mode- execution done on behalf of a user.
• Monitor mode- execution done on behalf of operating system.
• Mode bit added to computer hardware to indicate the current mode: monitor (0) or user (1).
• When an interrupt or fault occurs hardware switches to monitor mode.
• Privileged instructions can be issued only in monitor mode.

Hardware Protection

• Dual-Mode Operation
• I/O Protection
• Memory Protection
• CPU Protection

Migration of A From Disk to Register

Caching

• Use of high-speed memory to hold recently-accessed data.
• Requires a cache management policy.
• Caching introduces another level in storage hierarchy.This requires data that is simultaneously stored in more than one level to be consistent.

Storage-Device Hierarchy

Storage Hierarchy

• Storage systems organized in hierarchy.
• Speed
• Cost
• Volatility
• Caching- copying information into faster storage system; main memory can be viewed as a last cache for secondary storage.

Moving-Head Disk Mechanism

Storage Structure

• Main memory-only large storage media that the CPU can access directly.
• Secondary storage-extension of main memory that provides large non-volatile storage capacity.
• Magnetic Disks-rigid metal or glass platters covered with magnetic recording material.
• Disk surface is logically divided into tracks, which are subdivided into sectors.
• The disk controller determines the logical interaction between the device and the computer.

Direct Access Memory Structure

• Used for high-speed I/O devices able to transmit information at close to memory speeds.
• Device controllers transfers blocks of data from buffer storage directly to main memory without CPU intervention.
• Only on interrupt is generated per block, rather than the one interrupt per byte.

Device-Status Table

Two I/O Methods

I/O Structure

• After I/O starts, control returns to user program only upon I/O completion.
• Wait instruction idles the CPU until the next interrupt.
• Wait loop (contention for memory access).
• At most one I/O request is outstanding at a time, no simultaneous I/O processing.
• After I/O starts, control returns to user program without waiting for I/O completion.
• System call-request to the operating system to allow user to wait for I/O completion.
• Device Status Table contains entry for each I/O device indicating its type, address and state.
• Operating System indexes into I/O device table to determine device status and to modify table entry to include interrupt.

Interrupt Time Line For a Single Process Doing Output

Interrupt Handling

• The Operating System preserves the state of the CPU by storing registers and the program counter.
• Determines which types of interrupt has occured:
• polling
• vectored interrupt system
• Separate segments of code determine what action should be taken for each type of interrupt.

Common Functions of Interrupts

• Interrupt transfers control to the interrupt service routine generally, through the interrupt vector, which contains the addresses of all the service routines.
• Interrupt architecture must save the address of the interrupted instruction.
• Incoming interrupt are disabled while another interrupt is being processed to prevent a lost interrupt.
• A Trap is a software-generated interrupt caused either by an error or a user request.
• An operating system is interrupt driven.

Computer System Operation

• I/O devices and the CPU can execute concurrently.
• Each device controller is in charge of a particular device type.
• Each device controller has a local buffer.
• CPU moves data from/to main memory to/from local buffers.
• I/O is from the device to local buffer to controller.
• Device controller informs CPU that it has finished its operation by causing an interrupt.

Computer System Architecture

Computing Environments

• Traditional Computing
• Web-Based Computing
• Embedded Computing

Handheld Systems

• Personal Digital Assistants (PDAs)
• Cellular Telephones
• Issues:
• Limited Memory
• Slow Processors
• Small Display Screens